/* Copyright (c) 2016, The Linux Foundation. All rights reserved.
 *
 * This program is Mree software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 and
 * only version 2 as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

#include <dt-bindings/msm/msm-bus-ids.h>

&soc {
	ad_hoc_bus: ad-hoc-bus {
		/*Version = 4 */
		compatible = "qcom,msm-bus-device";
		reg = <0x1620000 0x40000>,
			<0x1000000 0x80000>,
			<0x1500000 0x10000>,
			<0x1660000 0x60000>,
			<0x1700000 0x60000>,
			<0x17900000 0x10000>,
			<0x1740000 0x10000>;

		reg-names = "snoc-base", "bimc-base", "cnoc-base",
			"a1noc-base", "a2noc-base", "gnoc-base",
			"mnoc-base";

		/*Buses*/
		fab_a1noc: fab-a1noc {
			cell-id = <MSM_BUS_FAB_A1_NOC>;
			label = "fab-a1noc";
			qcom,fab-dev;
			qcom,base-name = "a1noc-base";
			qcom,bypass-qos-prg;
			qcom,bus-type = <1>;
			qcom,qos-off = <4096>;
			qcom,base-offset = <36864>;
			clock-names = "bus_clk", "bus_a_clk";
			clocks = <&clock_gcc clk_aggre1_noc_clk>,
				<&clock_gcc clk_aggre1_noc_a_clk>;
		};

		fab_a2noc: fab-a2noc {
			cell-id = <MSM_BUS_FAB_A2_NOC>;
			label = "fab-a2noc";
			qcom,fab-dev;
			qcom,base-name = "a2noc-base";
			qcom,bypass-qos-prg;
			qcom,bus-type = <1>;
			qcom,qos-off = <4096>;
			qcom,base-offset = <20480>;
			clock-names = "bus_clk", "bus_a_clk";
			clocks = <&clock_gcc clk_aggre2_noc_clk>,
				<&clock_gcc clk_aggre2_noc_a_clk>;
		};

		fab_bimc: fab-bimc {
			cell-id = <MSM_BUS_FAB_BIMC>;
			label = "fab-bimc";
			qcom,fab-dev;
			qcom,base-name = "bimc-base";
			qcom,bus-type = <2>;
			qcom,bypass-qos-prg;
			qcom,util-fact = <153>;
			clock-names = "bus_clk", "bus_a_clk";
			clocks = <&clock_gcc clk_bimc_clk>,
				<&clock_gcc clk_bimc_a_clk>;
		};

		fab_cnoc: fab-cnoc {
			cell-id = <MSM_BUS_FAB_CONFIG_NOC>;
			label = "fab-cnoc";
			qcom,fab-dev;
			qcom,base-name = "cnoc-base";
			qcom,bypass-qos-prg;
			qcom,bus-type = <1>;
			clock-names = "bus_clk", "bus_a_clk";
			clocks = <&clock_gcc clk_cnoc_clk>,
				<&clock_gcc clk_cnoc_a_clk>;
		};

		fab_cr_virt: fab-cr_virt {
			cell-id = <MSM_BUS_FAB_CR_VIRT>;
			label = "fab-cr_virt";
			qcom,virt-dev;
			qcom,base-name = "cr_virt-base";
			qcom,bypass-qos-prg;
		};

		fab_gnoc: fab-gnoc {
			cell-id = <MSM_BUS_FAB_GNOC>;
			label = "fab-gnoc";
			qcom,fab-dev;
			qcom,virt-dev;
			qcom,base-name = "gnoc-base";
			qcom,bypass-qos-prg;
			clock-names = "bus_clk", "bus_a_clk";
			clocks = <&clock_gcc clk_bimc_clk>,
				<&clock_gcc clk_bimc_a_clk>;
		};

		fab_mnoc: fab-mnoc {
			cell-id = <MSM_BUS_FAB_MMSS_NOC>;
			label = "fab-mnoc";
			qcom,fab-dev;
			qcom,base-name = "mnoc-base";
			qcom,bypass-qos-prg;
			qcom,bus-type = <1>;
			qcom,qos-off = <4096>;
			qcom,base-offset = <16384>;
			qcom,util-fact = <153>;
			clock-names = "bus_clk", "bus_a_clk";
			clocks = <&clock_gcc clk_mmssnoc_axi_clk>,
				<&clock_gcc clk_mmssnoc_axi_a_clk>;
		};

		fab_snoc: fab-snoc {
			cell-id = <MSM_BUS_FAB_SYS_NOC>;
			label = "fab-snoc";
			qcom,fab-dev;
			qcom,base-name = "snoc-base";
			qcom,bypass-qos-prg;
			qcom,bus-type = <1>;
			qcom,qos-off = <4096>;
			qcom,base-offset = <20480>;
			clock-names = "bus_clk", "bus_a_clk";
			clocks = <&clock_gcc clk_snoc_clk>,
				<&clock_gcc clk_snoc_a_clk>;
		};

		/*Masters*/

		mas_pcie_0: mas-pcie-0 {
			cell-id = <MSM_BUS_MASTER_PCIE>;
			label = "mas-pcie-0";
			qcom,buswidth = <16>;
			qcom,agg-ports = <1>;
			qcom,ap-owned;
			qcom,qport = <1>;
			qcom,qos-mode = "fixed";
			qcom,connections = <&slv_a1noc_snoc>;
			qcom,prio1 = <1>;
			qcom,prio0 = <1>;
			qcom,bus-dev = <&fab_a1noc>;
			qcom,mas-rpm-id = <ICBID_MASTER_PCIE_0>;
		};

		mas_usb3: mas-usb3 {
			cell-id = <MSM_BUS_MASTER_USB3>;
			label = "mas-usb3";
			qcom,buswidth = <16>;
			qcom,agg-ports = <1>;
			qcom,ap-owned;
			qcom,qport = <3>;
			qcom,qos-mode = "fixed";
			qcom,connections = <&slv_a1noc_snoc>;
			qcom,prio1 = <1>;
			qcom,prio0 = <1>;
			qcom,bus-dev = <&fab_a1noc>;
			qcom,mas-rpm-id = <ICBID_MASTER_USB3>;
		};

		mas_ufs: mas-ufs {
			cell-id = <MSM_BUS_MASTER_UFS>;
			label = "mas-ufs";
			qcom,buswidth = <16>;
			qcom,agg-ports = <1>;
			qcom,ap-owned;
			qcom,qport = <0>;
			qcom,qos-mode = "fixed";
			qcom,connections = <&slv_a1noc_snoc>;
			qcom,prio1 = <1>;
			qcom,prio0 = <1>;
			qcom,bus-dev = <&fab_a1noc>;
			qcom,mas-rpm-id = <ICBID_MASTER_UFS>;
		};

		mas_blsp_2: mas-blsp-2 {
			cell-id = <MSM_BUS_MASTER_BLSP_2>;
			label = "mas-blsp-2";
			qcom,buswidth = <16>;
			qcom,agg-ports = <1>;
			qcom,qport = <3>;
			qcom,qos-mode = "fixed";
			qcom,connections = <&slv_a1noc_snoc>;
			qcom,bus-dev = <&fab_a1noc>;
			qcom,mas-rpm-id = <ICBID_MASTER_BLSP_2>;
		};

		mas_cnoc_a2noc: mas-cnoc-a2noc {
			cell-id = <0>;
			label = "mas-cnoc-a2noc";
			qcom,buswidth = <8>;
			qcom,agg-ports = <1>;
			qcom,ap-owned;
			qcom,connections = <&slv_a2noc_snoc>;
			qcom,bus-dev = <&fab_a2noc>;
			qcom,mas-rpm-id = <ICBID_MASTER_CNOC_A2NOC>;
		};

		mas_ipa: mas-ipa {
			cell-id = <MSM_BUS_MASTER_IPA>;
			label = "mas-ipa";
			qcom,buswidth = <8>;
			qcom,agg-ports = <1>;
			qcom,ap-owned;
			qcom,qport = <1>;
			qcom,qos-mode = "fixed";
			qcom,connections = <&slv_a2noc_snoc>;
			qcom,prio1 = <1>;
			qcom,prio0 = <1>;
			qcom,bus-dev = <&fab_a2noc>;
			qcom,mas-rpm-id = <ICBID_MASTER_IPA>;
		};

		mas_sdcc_2: mas-sdcc-2 {
			cell-id = <MSM_BUS_MASTER_SDCC_2>;
			label = "mas-sdcc-2";
			qcom,buswidth = <8>;
			qcom,agg-ports = <1>;
			qcom,qport = <6>;
			qcom,qos-mode = "fixed";
			qcom,connections = <&slv_a2noc_snoc>;
			qcom,bus-dev = <&fab_a2noc>;
			qcom,mas-rpm-id = <ICBID_MASTER_SDCC_2>;
		};

		mas_sdcc_4: mas-sdcc-4 {
			cell-id = <MSM_BUS_MASTER_SDCC_4>;
			label = "mas-sdcc-4";
			qcom,buswidth = <8>;
			qcom,agg-ports = <1>;
			qcom,qport = <7>;
			qcom,qos-mode = "fixed";
			qcom,connections = <&slv_a2noc_snoc>;
			qcom,bus-dev = <&fab_a2noc>;
			qcom,mas-rpm-id = <ICBID_MASTER_SDCC_4>;
		};

		mas_tsif: mas-tsif {
			cell-id = <MSM_BUS_MASTER_TSIF>;
			label = "mas-tsif";
			qcom,buswidth = <4>;
			qcom,agg-ports = <1>;
			qcom,ap-owned;
			qcom,connections = <&slv_a2noc_snoc>;
			qcom,bus-dev = <&fab_a2noc>;
			qcom,mas-rpm-id = <ICBID_MASTER_TSIF>;
		};

		mas_blsp_1: mas-blsp-1 {
			cell-id = <MSM_BUS_MASTER_BLSP_1>;
			label = "mas-blsp-1";
			qcom,buswidth = <16>;
			qcom,agg-ports = <1>;
			qcom,qport = <8>;
			qcom,qos-mode = "fixed";
			qcom,connections = <&slv_a2noc_snoc>;
			qcom,bus-dev = <&fab_a2noc>;
			qcom,mas-rpm-id = <ICBID_MASTER_BLSP_1>;
		};

		mas_cr_virt_a2noc: mas-cr-virt-a2noc {
			cell-id = <MSM_BUS_MASTER_CRVIRT_A2NOC>;
			label = "mas-cr-virt-a2noc";
			qcom,buswidth = <8>;
			qcom,agg-ports = <1>;
			qcom,qport = <9>;
			qcom,qos-mode = "fixed";
			qcom,connections = <&slv_a2noc_snoc>;
			qcom,bus-dev = <&fab_a2noc>;
			qcom,mas-rpm-id = <ICBID_MASTER_CRVIRT_A2NOC>;
		};

		mas_gnoc_bimc: mas-gnoc-bimc {
			cell-id = <MSM_BUS_MASTER_GNOC_BIMC>;
			label = "mas-gnoc-bimc";
			qcom,buswidth = <8>;
			qcom,agg-ports = <2>;
			qcom,ap-owned;
			qcom,qport = <0>;
			qcom,qos-mode = "fixed";
			qcom,connections = <&slv_ebi &slv_bimc_snoc_0>;
			qcom,prio-lvl = <0>;
			qcom,prio-rd = <0>;
			qcom,prio-wr = <0>;
			qcom,bus-dev = <&fab_bimc>;
			qcom,mas-rpm-id = <ICBID_MASTER_GNOC_BIMC>;
		};

		mas_oxili: mas-oxili {
			cell-id = <MSM_BUS_MASTER_GRAPHICS_3D>;
			label = "mas-oxili";
			qcom,buswidth = <8>;
			qcom,agg-ports = <2>;
			qcom,ap-owned;
			qcom,qport = <1>;
			qcom,qos-mode = "bypass";
			qcom,connections = < &slv_bimc_snoc_1
				&slv_hmss_l3&slv_ebi &slv_bimc_snoc_0>;
			qcom,bus-dev = <&fab_bimc>;
			qcom,mas-rpm-id = <ICBID_MASTER_GFX3D>;
		};

		mas_mnoc_bimc: mas-mnoc-bimc {
			cell-id = <MSM_BUS_MNOC_BIMC_MAS>;
			label = "mas-mnoc-bimc";
			qcom,buswidth = <8>;
			qcom,agg-ports = <2>;
			qcom,ap-owned;
			qcom,qport = <2>;
			qcom,qos-mode = "bypass";
			qcom,connections = < &slv_bimc_snoc_1
				&slv_hmss_l3&slv_ebi &slv_bimc_snoc_0>;
			qcom,bus-dev = <&fab_bimc>;
			qcom,mas-rpm-id = <ICBID_MASTER_MNOC_BIMC>;
		};

		mas_snoc_bimc: mas-snoc-bimc {
			cell-id = <MSM_BUS_SNOC_BIMC_MAS>;
			label = "mas-snoc-bimc";
			qcom,buswidth = <8>;
			qcom,agg-ports = <2>;
			qcom,qport = <3>;
			qcom,qos-mode = "bypass";
			qcom,connections = < &slv_hmss_l3&slv_ebi>;
			qcom,bus-dev = <&fab_bimc>;
			qcom,mas-rpm-id = <ICBID_MASTER_SNOC_BIMC>;
		};

		mas_snoc_cnoc: mas-snoc-cnoc {
			cell-id = <MSM_BUS_SNOC_CNOC_MAS>;
			label = "mas-snoc-cnoc";
			qcom,buswidth = <8>;
			qcom,agg-ports = <1>;
			qcom,ap-owned;
			qcom,connections = < &slv_skl &slv_blsp_2
				&slv_message_ram
				&slv_tlmm_west &slv_tsif
				&slv_mpm &slv_bimc_cfg
				&slv_tlmm_east &slv_spdm
				&slv_pimem_cfg &slv_a1noc_smmu_cfg
				&slv_blsp_1 &slv_clk_ctl
				&slv_prng &slv_usb3_0
				&slv_qdss_cfg &slv_qm_cfg
				&slv_a2noc_cfg &slv_pmic_arb
				&slv_ufs_cfg &slv_srvc_cnoc
				&slv_ahb2phy &slv_ipa
				&slv_glm &slv_snoc_cfg
				&slv_ssc_cfg &slv_sdcc_2
				&slv_sdcc_4 &slv_pdm
				&slv_cnoc_mnoc_mmss_cfg &slv_cnoc_mnoc_cfg
				&slv_mss_cfg &slv_imem_cfg
				&slv_a1noc_cfg &slv_gpuss_cfg
				&slv_tcsr &slv_tlmm_north>;
			qcom,bus-dev = <&fab_cnoc>;
			qcom,mas-rpm-id = <ICBID_MASTER_SNOC_CNOC>;
		};

		mas_qdss_dap: mas-qdss-dap {
			cell-id = <MSM_BUS_MASTER_QDSS_DAP>;
			label = "mas-qdss-dap";
			qcom,buswidth = <8>;
			qcom,agg-ports = <1>;
			qcom,ap-owned;
			qcom,connections = < &slv_skl &slv_blsp_2
				&slv_message_ram
				&slv_tlmm_west &slv_tsif
				&slv_mpm &slv_bimc_cfg
				&slv_tlmm_east &slv_spdm
				&slv_pimem_cfg &slv_a1noc_smmu_cfg
				&slv_blsp_1 &slv_clk_ctl
				&slv_prng &slv_usb3_0
				&slv_qdss_cfg &slv_qm_cfg
				&slv_a2noc_cfg &slv_pmic_arb
				&slv_ufs_cfg &slv_srvc_cnoc
				&slv_ahb2phy &slv_ipa
				&slv_glm &slv_snoc_cfg
				&slv_sdcc_2 &slv_sdcc_4
				&slv_pdm &slv_cnoc_mnoc_mmss_cfg
				&slv_cnoc_mnoc_cfg &slv_mss_cfg
				&slv_imem_cfg &slv_a1noc_cfg
				&slv_gpuss_cfg &slv_ssc_cfg
				&slv_tcsr &slv_tlmm_north
				&slv_cnoc_a2noc>;
			qcom,bus-dev = <&fab_cnoc>;
			qcom,mas-rpm-id = <ICBID_MASTER_QDSS_DAP>;
		};

		mas_crypto_c0: mas-crypto-c0 {
			cell-id = <MSM_BUS_MASTER_CRYPTO_CORE0>;
			label = "mas-crypto-c0";
			qcom,buswidth = <650>;
			qcom,agg-ports = <1>;
			qcom,connections = <&slv_cr_virt_a2noc>;
			qcom,bus-dev = <&fab_a2noc>;
			qcom,mas-rpm-id = <ICBID_MASTER_CRYPTO_CORE0>;
		};

		mas_apps_proc: mas-apps-proc {
			cell-id = <MSM_BUS_MASTER_AMPSS_M0>;
			label = "mas-apps-proc";
			qcom,buswidth = <32>;
			qcom,agg-ports = <1>;
			qcom,ap-owned;
			qcom,connections = <&slv_gnoc_bimc>;
			qcom,bus-dev = <&fab_gnoc>;
			qcom,mas-rpm-id = <ICBID_MASTER_APPSS_PROC>;
		};

		mas_cnoc_mnoc_mmss_cfg: mas-cnoc-mnoc-mmss-cfg {
			cell-id = <MSM_BUS_MASTER_CNOC_MNOC_MMSS_CFG>;
			label = "mas-cnoc-mnoc-mmss-cfg";
			qcom,buswidth = <8>;
			qcom,agg-ports = <1>;
			qcom,ap-owned;
			qcom,connections = < &slv_camera_throttle_cfg
				&slv_venus_cfg &slv_misc_cfg
				&slv_camera_cfg &slv_display_throttle_cfg
				&slv_venus_throttle_cfg &slv_display_cfg
				&slv_mmss_clk_cfg &slv_vmem_cfg
				&slv_mmss_clk_xpu_cfg &slv_smmu_cfg>;
			qcom,bus-dev = <&fab_mnoc>;
			qcom,mas-rpm-id = <ICBID_MASTER_CNOC_MNOC_MMSS_CFG>;
		};

		mas_cnoc_mnoc_cfg: mas-cnoc-mnoc-cfg {
			cell-id = <MSM_BUS_MASTER_CNOC_MNOC_CFG>;
			label = "mas-cnoc-mnoc-cfg";
			qcom,buswidth = <8>;
			qcom,agg-ports = <1>;
			qcom,ap-owned;
			qcom,connections = <&slv_srvc_mnoc>;
			qcom,bus-dev = <&fab_mnoc>;
			qcom,mas-rpm-id = <ICBID_MASTER_CNOC_MNOC_CFG>;
		};

		mas_cpp: mas-cpp {
			cell-id = <MSM_BUS_MASTER_CPP>;
			label = "mas-cpp";
			qcom,buswidth = <32>;
			qcom,agg-ports = <1>;
			qcom,ap-owned;
			qcom,qport = <5>;
			qcom,qos-mode = "bypass";
			qcom,connections = <&slv_mnoc_bimc>;
			qcom,bus-dev = <&fab_mnoc>;
			qcom,mas-rpm-id = <ICBID_MASTER_CPP>;
		};

		mas_jpeg: mas-jpeg {
			cell-id = <MSM_BUS_MASTER_JPEG>;
			label = "mas-jpeg";
			qcom,buswidth = <32>;
			qcom,agg-ports = <1>;
			qcom,ap-owned;
			qcom,qport = <7>;
			qcom,qos-mode = "bypass";
			qcom,connections = <&slv_mnoc_bimc>;
			qcom,bus-dev = <&fab_mnoc>;
			qcom,mas-rpm-id = <ICBID_MASTER_JPEG>;
		};

		mas_mdp_p0: mas-mdp-p0 {
			cell-id = <MSM_BUS_MASTER_MDP_PORT0>;
			label = "mas-mdp-p0";
			qcom,buswidth = <32>;
			qcom,agg-ports = <1>;
			qcom,ap-owned;
			qcom,qport = <1>;
			qcom,qos-mode = "bypass";
			qcom,connections = <&slv_mnoc_bimc>;
			qcom,bus-dev = <&fab_mnoc>;
			qcom,mas-rpm-id = <ICBID_MASTER_MDP0>;
		};

		mas_mdp_p1: mas-mdp-p1 {
			cell-id = <MSM_BUS_MASTER_MDP_PORT1>;
			label = "mas-mdp-p1";
			qcom,buswidth = <32>;
			qcom,agg-ports = <1>;
			qcom,ap-owned;
			qcom,qport = <2>;
			qcom,qos-mode = "bypass";
			qcom,connections = <&slv_mnoc_bimc>;
			qcom,bus-dev = <&fab_mnoc>;
			qcom,mas-rpm-id = <ICBID_MASTER_MDP1>;
		};

		mas_rotator: mas-rotator {
			cell-id = <MSM_BUS_MASTER_ROTATOR>;
			label = "mas-rotator";
			qcom,buswidth = <32>;
			qcom,agg-ports = <1>;
			qcom,ap-owned;
			qcom,qport = <0>;
			qcom,qos-mode = "bypass";
			qcom,connections = <&slv_mnoc_bimc>;
			qcom,bus-dev = <&fab_mnoc>;
			qcom,mas-rpm-id = <ICBID_MASTER_ROTATOR>;
		};

		mas_venus: mas-venus {
			cell-id = <MSM_BUS_MASTER_VIDEO_P0>;
			label = "mas-venus";
			qcom,buswidth = <32>;
			qcom,agg-ports = <2>;
			qcom,ap-owned;
			qcom,qport = <3 4>;
			qcom,qos-mode = "bypass";
			qcom,connections = <&slv_mnoc_bimc>;
			qcom,bus-dev = <&fab_mnoc>;
			qcom,mas-rpm-id = <ICBID_MASTER_VIDEO>;
		};

		mas_vfe: mas-vfe {
			cell-id = <MSM_BUS_MASTER_VFE>;
			label = "mas-vfe";
			qcom,buswidth = <32>;
			qcom,agg-ports = <1>;
			qcom,ap-owned;
			qcom,qport = <6>;
			qcom,qos-mode = "bypass";
			qcom,connections = <&slv_mnoc_bimc>;
			qcom,bus-dev = <&fab_mnoc>;
			qcom,mas-rpm-id = <ICBID_MASTER_VFE>;
		};

		mas_venus_vmem: mas-venus-vmem {
			cell-id = <MSM_BUS_MASTER_VIDEO_P0_OCMEM>;
			label = "mas-venus-vmem";
			qcom,buswidth = <32>;
			qcom,agg-ports = <1>;
			qcom,ap-owned;
			qcom,connections = <&slv_vmem>;
			qcom,bus-dev = <&fab_mnoc>;
			qcom,mas-rpm-id = <ICBID_MASTER_VENUS_VMEM>;
		};

		mas_hmss: mas-hmss {
			cell-id = <MSM_BUS_MASTER_HMSS>;
			label = "mas-hmss";
			qcom,buswidth = <16>;
			qcom,agg-ports = <1>;
			qcom,ap-owned;
			qcom,qport = <3>;
			qcom,qos-mode = "fixed";
			qcom,connections = < &slv_pimem &slv_imem
				&slv_snoc_bimc>;
			qcom,prio1 = <1>;
			qcom,prio0 = <1>;
			qcom,bus-dev = <&fab_snoc>;
			qcom,mas-rpm-id = <ICBID_MASTER_HMSS>;
		};

		mas_qdss_bam: mas-qdss-bam {
			cell-id = <MSM_BUS_MASTER_QDSS_BAM>;
			label = "mas-qdss-bam";
			qcom,buswidth = <16>;
			qcom,agg-ports = <1>;
			qcom,ap-owned;
			qcom,qport = <1>;
			qcom,qos-mode = "fixed";
			qcom,connections = < &slv_imem &slv_pimem &slv_snoc_cnoc
				&slv_snoc_bimc>;
			qcom,prio1 = <1>;
			qcom,prio0 = <1>;
			qcom,bus-dev = <&fab_snoc>;
			qcom,mas-rpm-id = <ICBID_MASTER_QDSS_BAM>;
		};

		mas_snoc_cfg: mas-snoc-cfg {
			cell-id = <MSM_BUS_MASTER_SNOC_CFG>;
			label = "mas-snoc-cfg";
			qcom,buswidth = <16>;
			qcom,agg-ports = <1>;
			qcom,connections = <&slv_srvc_snoc>;
			qcom,bus-dev = <&fab_snoc>;
			qcom,mas-rpm-id = <ICBID_MASTER_SNOC_CFG>;
		};

		mas_bimc_snoc_0: mas-bimc-snoc-0 {
			cell-id = <MSM_BUS_BIMC_SNOC_MAS>;
			label = "mas-bimc-snoc-0";
			qcom,buswidth = <16>;
			qcom,agg-ports = <1>;
			qcom,connections = < &slv_pimem &slv_lpass&slv_hmss
				 &slv_wlan &slv_snoc_cnoc
				 &slv_imem &slv_qdss_stm>;
			qcom,bus-dev = <&fab_snoc>;
			qcom,mas-rpm-id = <ICBID_MASTER_BIMC_SNOC_0>;
		};

		mas_bimc_snoc_1: mas-bimc-snoc-1 {
			cell-id = <MSM_BUS_BIMC_SNOC_1_MAS>;
			label = "mas-bimc-snoc-1";
			qcom,buswidth = <16>;
			qcom,agg-ports = <1>;
			qcom,ap-owned;
			qcom,connections = <&slv_pcie_0>;
			qcom,bus-dev = <&fab_snoc>;
			qcom,mas-rpm-id = <ICBID_MASTER_BIMC_SNOC_1>;
		};

		mas_a1noc_snoc: mas-a1noc-snoc {
			cell-id = <MSM_BUS_A1NOC_SNOC_MAS>;
			label = "mas-a1noc-snoc";
			qcom,buswidth = <16>;
			qcom,agg-ports = <1>;
			qcom,connections = < &slv_pimem &slv_pcie_0 &slv_lpass
				&slv_hmss &slv_snoc_bimc
				 &slv_snoc_cnoc &slv_imem
				 &slv_qdss_stm>;
			qcom,bus-dev = <&fab_snoc>;
			qcom,mas-rpm-id = <ICBID_MASTER_A1NOC_SNOC>;
		};

		mas_a2noc_snoc: mas-a2noc-snoc {
			cell-id = <MSM_BUS_A2NOC_SNOC_MAS>;
			label = "mas-a2noc-snoc";
			qcom,buswidth = <16>;
			qcom,agg-ports = <1>;
			qcom,connections = < &slv_pimem &slv_pcie_0 &slv_lpass
				&slv_hmss &slv_snoc_bimc
				 &slv_wlan &slv_snoc_cnoc
				 &slv_imem &slv_qdss_stm>;
			qcom,bus-dev = <&fab_snoc>;
			qcom,mas-rpm-id = <ICBID_MASTER_A2NOC_SNOC>;
		};

		mas_qdss_etr: mas-qdss-etr {
			cell-id = <MSM_BUS_MASTER_QDSS_ETR>;
			label = "mas-qdss-etr";
			qcom,buswidth = <16>;
			qcom,agg-ports = <1>;
			qcom,ap-owned;
			qcom,qport = <2>;
			qcom,qos-mode = "fixed";
			qcom,connections = < &slv_imem &slv_pimem &slv_snoc_cnoc
				&slv_snoc_bimc>;
			qcom,prio1 = <1>;
			qcom,prio0 = <1>;
			qcom,bus-dev = <&fab_snoc>;
			qcom,mas-rpm-id = <ICBID_MASTER_QDSS_ETR>;
		};

		/*Internal nodes*/

		/*Slaves*/

		slv_a1noc_snoc:slv-a1noc-snoc {
			cell-id = <MSM_BUS_A1NOC_SNOC_SLV>;
			label = "slv-a1noc-snoc";
			qcom,buswidth = <16>;
			qcom,agg-ports = <1>;
			qcom,bus-dev = <&fab_a1noc>;
			qcom,connections = <&mas_a1noc_snoc>;
			qcom,slv-rpm-id = <ICBID_SLAVE_A1NOC_SNOC>;
		};

		slv_a2noc_snoc:slv-a2noc-snoc {
			cell-id = <MSM_BUS_A2NOC_SNOC_SLV>;
			label = "slv-a2noc-snoc";
			qcom,buswidth = <16>;
			qcom,agg-ports = <1>;
			qcom,bus-dev = <&fab_a2noc>;
			qcom,connections = <&mas_a2noc_snoc>;
			qcom,slv-rpm-id = <ICBID_SLAVE_A2NOC_SNOC>;
		};

		slv_ebi:slv-ebi {
			cell-id = <MSM_BUS_SLAVE_EBI_CH0>;
			label = "slv-ebi";
			qcom,buswidth = <8>;
			qcom,agg-ports = <2>;
			qcom,bus-dev = <&fab_bimc>;
			qcom,slv-rpm-id = <ICBID_SLAVE_EBI1>;
		};

		slv_hmss_l3:slv-hmss-l3 {
			cell-id = <MSM_BUS_SLAVE_HMSS_L3>;
			label = "slv-hmss-l3";
			qcom,buswidth = <8>;
			qcom,agg-ports = <1>;
			qcom,bus-dev = <&fab_bimc>;
			qcom,slv-rpm-id = <ICBID_SLAVE_HMSS_L3>;
		};

		slv_bimc_snoc_0:slv-bimc-snoc-0 {
			cell-id = <MSM_BUS_BIMC_SNOC_SLV>;
			label = "slv-bimc-snoc-0";
			qcom,buswidth = <8>;
			qcom,agg-ports = <1>;
			qcom,bus-dev = <&fab_bimc>;
			qcom,connections = <&mas_bimc_snoc_0>;
			qcom,slv-rpm-id = <ICBID_SLAVE_BIMC_SNOC_0>;
		};

		slv_bimc_snoc_1:slv-bimc-snoc-1 {
			cell-id = <MSM_BUS_BIMC_SNOC_1_SLV>;
			label = "slv-bimc-snoc-1";
			qcom,buswidth = <8>;
			qcom,agg-ports = <1>;
			qcom,ap-owned;
			qcom,bus-dev = <&fab_bimc>;
			qcom,connections = <&mas_bimc_snoc_1>;
			qcom,slv-rpm-id = <ICBID_SLAVE_BIMC_SNOC_1>;
		};

		slv_cnoc_a2noc:slv-cnoc-a2noc {
			cell-id = <MSM_BUS_CNOC_SNOC_SLV>;
			label = "slv-cnoc-a2noc";
			qcom,buswidth = <4>;
			qcom,agg-ports = <1>;
			qcom,ap-owned;
			qcom,bus-dev = <&fab_cnoc>;
			qcom,connections = <&mas_cnoc_a2noc>;
			qcom,slv-rpm-id = <ICBID_SLAVE_CNOC_A2NOC>;
		};

		slv_ssc_cfg:slv-ssc-cfg {
			cell-id = <MSM_BUS_SLAVE_SSC_CFG>;
			label = "slv-ssc-cfg";
			qcom,buswidth = <4>;
			qcom,agg-ports = <1>;
			qcom,ap-owned;
			qcom,bus-dev = <&fab_cnoc>;
			qcom,slv-rpm-id = <ICBID_SLAVE_SSC_CFG>;
		};

		slv_mpm:slv-mpm {
			cell-id = <MSM_BUS_SLAVE_MPM>;
			label = "slv-mpm";
			qcom,buswidth = <4>;
			qcom,agg-ports = <1>;
			qcom,ap-owned;
			qcom,bus-dev = <&fab_cnoc>;
			qcom,slv-rpm-id = <ICBID_SLAVE_MPM>;
		};

		slv_pmic_arb:slv-pmic-arb {
			cell-id = <MSM_BUS_SLAVE_PMIC_ARB>;
			label = "slv-pmic-arb";
			qcom,buswidth = <4>;
			qcom,agg-ports = <1>;
			qcom,ap-owned;
			qcom,bus-dev = <&fab_cnoc>;
			qcom,slv-rpm-id = <ICBID_SLAVE_PMIC_ARB>;
		};
		slv_tlmm_north:slv-tlmm-north {
			cell-id = <MSM_BUS_SLAVE_TLMM_NORTH>;
			label = "slv-tlmm-north";
			qcom,buswidth = <4>;
			qcom,agg-ports = <1>;
			qcom,ap-owned;
			qcom,bus-dev = <&fab_cnoc>;
			qcom,slv-rpm-id = <ICBID_SLAVE_TLMM_NORTH>;
		};
		slv_pimem_cfg:slv-pimem-cfg {
			cell-id = <MSM_BUS_SLAVE_PIMEM_CFG>;
			label = "slv-pimem-cfg";
			qcom,buswidth = <4>;
			qcom,agg-ports = <1>;
			qcom,ap-owned;
			qcom,bus-dev = <&fab_cnoc>;
			qcom,slv-rpm-id = <ICBID_SLAVE_PIMEM_CFG>;
		};

		slv_imem_cfg:slv-imem-cfg {
			cell-id = <MSM_BUS_SLAVE_IMEM_CFG>;
			label = "slv-imem-cfg";
			qcom,buswidth = <4>;
			qcom,agg-ports = <1>;
			qcom,ap-owned;
			qcom,bus-dev = <&fab_cnoc>;
			qcom,slv-rpm-id = <ICBID_SLAVE_IMEM_CFG>;
		};

		slv_message_ram:slv-message-ram {
			cell-id = <MSM_BUS_SLAVE_MESSAGE_RAM>;
			label = "slv-message-ram";
			qcom,buswidth = <4>;
			qcom,agg-ports = <1>;
			qcom,ap-owned;
			qcom,bus-dev = <&fab_cnoc>;
			qcom,slv-rpm-id = <ICBID_SLAVE_MESSAGE_RAM>;
		};

		slv_skl:slv-skl {
			cell-id = <MSM_BUS_SLAVE_SKL>;
			label = "slv-skl";
			qcom,buswidth = <4>;
			qcom,agg-ports = <1>;
			qcom,ap-owned;
			qcom,bus-dev = <&fab_cnoc>;
			qcom,slv-rpm-id = <ICBID_SLAVE_SKL>;
		};

		slv_bimc_cfg:slv-bimc-cfg {
			cell-id = <MSM_BUS_SLAVE_BIMC_CFG>;
			label = "slv-bimc-cfg";
			qcom,buswidth = <4>;
			qcom,agg-ports = <1>;
			qcom,ap-owned;
			qcom,bus-dev = <&fab_cnoc>;
			qcom,slv-rpm-id = <ICBID_SLAVE_BIMC_CFG>;
		};

		slv_prng:slv-prng {
			cell-id = <MSM_BUS_SLAVE_PRNG>;
			label = "slv-prng";
			qcom,buswidth = <4>;
			qcom,agg-ports = <1>;
			qcom,ap-owned;
			qcom,bus-dev = <&fab_cnoc>;
			qcom,slv-rpm-id = <ICBID_SLAVE_PRNG>;
		};

		slv_a2noc_cfg:slv-a2noc-cfg {
			cell-id = <MSM_BUS_SLAVE_A2NOC_CFG>;
			label = "slv-a2noc-cfg";
			qcom,buswidth = <4>;
			qcom,agg-ports = <1>;
			qcom,ap-owned;
			qcom,bus-dev = <&fab_cnoc>;
			qcom,slv-rpm-id = <ICBID_SLAVE_A2NOC_CFG>;
		};

		slv_ipa:slv-ipa {
			cell-id = <MSM_BUS_SLAVE_IPA_CFG>;
			label = "slv-ipa";
			qcom,buswidth = <4>;
			qcom,agg-ports = <1>;
			qcom,ap-owned;
			qcom,bus-dev = <&fab_cnoc>;
			qcom,slv-rpm-id = <ICBID_SLAVE_IPA_CFG>;
		};

		slv_tcsr:slv-tcsr {
			cell-id = <MSM_BUS_SLAVE_TCSR>;
			label = "slv-tcsr";
			qcom,buswidth = <4>;
			qcom,agg-ports = <1>;
			qcom,ap-owned;
			qcom,bus-dev = <&fab_cnoc>;
			qcom,slv-rpm-id = <ICBID_SLAVE_TCSR>;
		};

		slv_snoc_cfg:slv-snoc-cfg {
			cell-id = <MSM_BUS_SLAVE_SNOC_CFG>;
			label = "slv-snoc-cfg";
			qcom,buswidth = <4>;
			qcom,agg-ports = <1>;
			qcom,ap-owned;
			qcom,bus-dev = <&fab_cnoc>;
			qcom,slv-rpm-id = <ICBID_SLAVE_SNOC_CFG>;
		};

		slv_clk_ctl:slv-clk-ctl {
			cell-id = <MSM_BUS_SLAVE_CLK_CTL>;
			label = "slv-clk-ctl";
			qcom,buswidth = <4>;
			qcom,agg-ports = <1>;
			qcom,ap-owned;
			qcom,bus-dev = <&fab_cnoc>;
			qcom,slv-rpm-id = <ICBID_SLAVE_CLK_CTL>;
		};

		slv_glm:slv-glm {
			cell-id = <MSM_BUS_SLAVE_GLM>;
			label = "slv-glm";
			qcom,buswidth = <4>;
			qcom,agg-ports = <1>;
			qcom,ap-owned;
			qcom,bus-dev = <&fab_cnoc>;
			qcom,slv-rpm-id = <ICBID_SLAVE_GLM>;
		};

		slv_spdm:slv-spdm {
			cell-id = <MSM_BUS_SLAVE_SPDM_WRAPPER>;
			label = "slv-spdm";
			qcom,buswidth = <4>;
			qcom,agg-ports = <1>;
			qcom,ap-owned;
			qcom,bus-dev = <&fab_cnoc>;
			qcom,slv-rpm-id = <ICBID_SLAVE_SPDM_WRAPPER>;
		};

		slv_gpuss_cfg:slv-gpuss-cfg {
			cell-id = <MSM_BUS_SLAVE_GRAPHICS_3D_CFG>;
			label = "slv-gpuss-cfg";
			qcom,buswidth = <4>;
			qcom,agg-ports = <1>;
			qcom,ap-owned;
			qcom,bus-dev = <&fab_cnoc>;
			qcom,slv-rpm-id = <ICBID_SLAVE_GFX3D_CFG>;
		};

		slv_cnoc_mnoc_cfg:slv-cnoc-mnoc-cfg {
			cell-id = <MSM_BUS_SLAVE_CNOC_MNOC_CFG>;
			label = "slv-cnoc-mnoc-cfg";
			qcom,buswidth = <4>;
			qcom,agg-ports = <1>;
			qcom,ap-owned;
			qcom,bus-dev = <&fab_cnoc>;
			qcom,connections = <&mas_cnoc_mnoc_cfg>;
			qcom,slv-rpm-id = <ICBID_SLAVE_CNOC_MNOC_CFG>;
		};

		slv_qm_cfg:slv-qm-cfg {
			cell-id = <MSM_BUS_SLAVE_QM_CFG>;
			label = "slv-qm-cfg";
			qcom,buswidth = <4>;
			qcom,agg-ports = <1>;
			qcom,ap-owned;
			qcom,bus-dev = <&fab_cnoc>;
			qcom,slv-rpm-id = <ICBID_SLAVE_QM_CFG>;
		};

		slv_mss_cfg:slv-mss-cfg {
			cell-id = <MSM_BUS_SLAVE_CNOC_MSS>;
			label = "slv-mss-cfg";
			qcom,buswidth = <4>;
			qcom,agg-ports = <1>;
			qcom,ap-owned;
			qcom,bus-dev = <&fab_cnoc>;
			qcom,slv-rpm-id = <ICBID_SLAVE_CNOC_MSS>;
		};

		slv_ufs_cfg:slv-ufs-cfg {
			cell-id = <MSM_BUS_SLAVE_UFS_CFG>;
			label = "slv-ufs-cfg";
			qcom,buswidth = <4>;
			qcom,agg-ports = <1>;
			qcom,ap-owned;
			qcom,bus-dev = <&fab_cnoc>;
			qcom,slv-rpm-id = <ICBID_SLAVE_UFS_CFG>;
		};

		slv_tlmm_west:slv-tlmm-west {
			cell-id = <MSM_BUS_SLAVE_TLMM_WEST>;
			label = "slv-tlmm-west";
			qcom,buswidth = <4>;
			qcom,agg-ports = <1>;
			qcom,ap-owned;
			qcom,bus-dev = <&fab_cnoc>;
			qcom,slv-rpm-id = <ICBID_SLAVE_TLMM_WEST>;
		};

		slv_a1noc_cfg:slv-a1noc-cfg {
			cell-id = <MSM_BUS_SLAVE_A1NOC_CFG>;
			label = "slv-a1noc-cfg";
			qcom,buswidth = <4>;
			qcom,agg-ports = <1>;
			qcom,ap-owned;
			qcom,bus-dev = <&fab_cnoc>;
			qcom,slv-rpm-id = <ICBID_SLAVE_A1NOC_CFG>;
		};

		slv_ahb2phy:slv-ahb2phy {
			cell-id = <MSM_BUS_SLAVE_PCIE20_AHB2PHY>;
			label = "slv-ahb2phy";
			qcom,buswidth = <4>;
			qcom,agg-ports = <1>;
			qcom,ap-owned;
			qcom,bus-dev = <&fab_cnoc>;
			qcom,slv-rpm-id = <ICBID_SLAVE_PCIE20_AHB2PHY>;
		};

		slv_blsp_2:slv-blsp-2 {
			cell-id = <MSM_BUS_SLAVE_BLSP_2>;
			label = "slv-blsp-2";
			qcom,buswidth = <4>;
			qcom,agg-ports = <1>;
			qcom,ap-owned;
			qcom,bus-dev = <&fab_cnoc>;
			qcom,slv-rpm-id = <ICBID_SLAVE_BLSP_2>;
		};

		slv_pdm:slv-pdm {
			cell-id = <MSM_BUS_SLAVE_PDM>;
			label = "slv-pdm";
			qcom,buswidth = <4>;
			qcom,agg-ports = <1>;
			qcom,ap-owned;
			qcom,bus-dev = <&fab_cnoc>;
			qcom,slv-rpm-id = <ICBID_SLAVE_PDM>;
		};

		slv_usb3_0:slv-usb3-0 {
			cell-id = <MSM_BUS_SLAVE_USB3>;
			label = "slv-usb3-0";
			qcom,buswidth = <4>;
			qcom,agg-ports = <1>;
			qcom,ap-owned;
			qcom,bus-dev = <&fab_cnoc>;
			qcom,slv-rpm-id = <ICBID_SLAVE_USB3_0>;
		};

		slv_a1noc_smmu_cfg:slv-a1noc-smmu-cfg {
			cell-id = <MSM_BUS_SLAVE_A1NOC_SMMU_CFG>;
			label = "slv-a1noc-smmu-cfg";
			qcom,buswidth = <8>;
			qcom,agg-ports = <1>;
			qcom,ap-owned;
			qcom,bus-dev = <&fab_cnoc>;
			qcom,slv-rpm-id = <ICBID_SLAVE_A1NOC_SMMU_CFG>;
		};

		slv_blsp_1:slv-blsp-1 {
			cell-id = <MSM_BUS_SLAVE_BLSP_1>;
			label = "slv-blsp-1";
			qcom,buswidth = <4>;
			qcom,agg-ports = <1>;
			qcom,ap-owned;
			qcom,bus-dev = <&fab_cnoc>;
			qcom,slv-rpm-id = <ICBID_SLAVE_BLSP_1>;
		};

		slv_sdcc_2:slv-sdcc-2 {
			cell-id = <MSM_BUS_SLAVE_SDCC_2>;
			label = "slv-sdcc-2";
			qcom,buswidth = <4>;
			qcom,agg-ports = <1>;
			qcom,ap-owned;
			qcom,bus-dev = <&fab_cnoc>;
			qcom,slv-rpm-id = <ICBID_SLAVE_SDCC_2>;
		};

		slv_sdcc_4:slv-sdcc-4 {
			cell-id = <MSM_BUS_SLAVE_SDCC_4>;
			label = "slv-sdcc-4";
			qcom,buswidth = <4>;
			qcom,agg-ports = <1>;
			qcom,ap-owned;
			qcom,bus-dev = <&fab_cnoc>;
			qcom,slv-rpm-id = <ICBID_SLAVE_SDCC_4>;
		};

		slv_tsif:slv-tsif {
			cell-id = <MSM_BUS_SLAVE_TSIF>;
			label = "slv-tsif";
			qcom,buswidth = <4>;
			qcom,agg-ports = <1>;
			qcom,ap-owned;
			qcom,bus-dev = <&fab_cnoc>;
			qcom,slv-rpm-id = <ICBID_SLAVE_TSIF>;
		};

		slv_qdss_cfg:slv-qdss-cfg {
			cell-id = <MSM_BUS_SLAVE_QDSS_CFG>;
			label = "slv-qdss-cfg";
			qcom,buswidth = <4>;
			qcom,agg-ports = <1>;
			qcom,ap-owned;
			qcom,bus-dev = <&fab_cnoc>;
			qcom,slv-rpm-id = <ICBID_SLAVE_QDSS_CFG>;
		};

		slv_tlmm_east:slv-tlmm-east {
			cell-id = <MSM_BUS_SLAVE_TLMM_EAST>;
			label = "slv-tlmm-east";
			qcom,buswidth = <4>;
			qcom,agg-ports = <1>;
			qcom,ap-owned;
			qcom,bus-dev = <&fab_cnoc>;
			qcom,slv-rpm-id = <ICBID_SLAVE_TLMM_EAST>;
		};

		slv_cnoc_mnoc_mmss_cfg:slv-cnoc-mnoc-mmss-cfg {
			cell-id = <MSM_BUS_SLAVE_CNOC_MNOC_MMSS_CFG>;
			label = "slv-cnoc-mnoc-mmss-cfg";
			qcom,buswidth = <8>;
			qcom,agg-ports = <1>;
			qcom,ap-owned;
			qcom,bus-dev = <&fab_cnoc>;
			qcom,connections = <&mas_cnoc_mnoc_mmss_cfg>;
			qcom,slv-rpm-id = <ICBID_SLAVE_CNOC_MNOC_MMSS_CFG>;
		};

		slv_srvc_cnoc:slv-srvc-cnoc {
			cell-id = <MSM_BUS_SLAVE_SERVICE_CNOC>;
			label = "slv-srvc-cnoc";
			qcom,buswidth = <4>;
			qcom,agg-ports = <1>;
			qcom,ap-owned;
			qcom,bus-dev = <&fab_cnoc>;
			qcom,slv-rpm-id = <ICBID_SLAVE_SERVICE_CNOC>;
		};

		slv_cr_virt_a2noc:slv-cr-virt-a2noc {
			cell-id = <MSM_BUS_SLAVE_CRVIRT_A2NOC>;
			label = "slv-cr-virt-a2noc";
			qcom,buswidth = <8>;
			qcom,agg-ports = <1>;
			qcom,ap-owned;
			qcom,bus-dev = <&fab_a2noc>;
			qcom,connections = <&mas_cr_virt_a2noc>;
			qcom,slv-rpm-id = <ICBID_SLAVE_CRVIRT_A2NOC>;
		};

		slv_gnoc_bimc:slv-gnoc-bimc {
			cell-id = <MSM_BUS_SLAVE_GNOC_BIMC>;
			label = "slv-gnoc-bimc";
			qcom,buswidth = <32>;
			qcom,agg-ports = <1>;
			qcom,ap-owned;
			qcom,bus-dev = <&fab_gnoc>;
			qcom,connections = <&mas_gnoc_bimc>;
			qcom,slv-rpm-id = <ICBID_SLAVE_GNOC_BIMC>;
		};

		slv_camera_cfg:slv-camera-cfg {
			cell-id = <MSM_BUS_SLAVE_CAMERA_CFG>;
			label = "slv-camera-cfg";
			qcom,buswidth = <8>;
			qcom,agg-ports = <1>;
			qcom,ap-owned;
			qcom,bus-dev = <&fab_mnoc>;
			qcom,slv-rpm-id = <ICBID_SLAVE_CAMERA_CFG>;
		};

		slv_camera_throttle_cfg:slv-camera-throttle-cfg {
			cell-id = <MSM_BUS_SLAVE_CAMERA_THROTTLE_CFG>;
			label = "slv-camera-throttle-cfg";
			qcom,buswidth = <8>;
			qcom,agg-ports = <1>;
			qcom,ap-owned;
			qcom,bus-dev = <&fab_mnoc>;
			qcom,slv-rpm-id = <ICBID_SLAVE_CAMERA_THROTTLE_CFG>;
		};

		slv_misc_cfg:slv-misc-cfg {
			cell-id = <MSM_BUS_SLAVE_MISC_CFG>;
			label = "slv-misc-cfg";
			qcom,buswidth = <8>;
			qcom,agg-ports = <1>;
			qcom,ap-owned;
			qcom,bus-dev = <&fab_mnoc>;
			qcom,slv-rpm-id = <ICBID_SLAVE_MISC_CFG>;
		};

		slv_venus_throttle_cfg:slv-venus-throttle-cfg {
			cell-id = <MSM_BUS_SLAVE_VENUS_THROTTLE_CFG>;
			label = "slv-venus-throttle-cfg";
			qcom,buswidth = <8>;
			qcom,agg-ports = <1>;
			qcom,ap-owned;
			qcom,bus-dev = <&fab_mnoc>;
			qcom,slv-rpm-id = <ICBID_SLAVE_VENUS_THROTTLE_CFG>;
		};

		slv_venus_cfg:slv-venus-cfg {
			cell-id = <MSM_BUS_SLAVE_VENUS_CFG>;
			label = "slv-venus-cfg";
			qcom,buswidth = <8>;
			qcom,agg-ports = <1>;
			qcom,ap-owned;
			qcom,bus-dev = <&fab_mnoc>;
			qcom,slv-rpm-id = <ICBID_SLAVE_VENUS_CFG>;
		};

		slv_vmem_cfg:slv-vmem-cfg {
			cell-id = <MSM_BUS_SLAVE_VMEM_CFG>;
			label = "slv-vmem-cfg";
			qcom,buswidth = <8>;
			qcom,agg-ports = <1>;
			qcom,ap-owned;
			qcom,bus-dev = <&fab_mnoc>;
			qcom,slv-rpm-id = <ICBID_SLAVE_VMEM_CFG>;
			qcom,enable-only-clk;
			clock-names = "node_clk";
			clocks = <&clock_mmss clk_mmss_mnoc_maxi_clk>;
		};

		slv_mmss_clk_xpu_cfg:slv-mmss-clk-xpu-cfg {
			cell-id = <MSM_BUS_SLAVE_MMSS_CLK_XPU_CFG>;
			label = "slv-mmss-clk-xpu-cfg";
			qcom,buswidth = <8>;
			qcom,agg-ports = <1>;
			qcom,ap-owned;
			qcom,bus-dev = <&fab_mnoc>;
			qcom,slv-rpm-id = <ICBID_SLAVE_MMSS_CLK_XPU_CFG>;
		};

		slv_mmss_clk_cfg:slv-mmss-clk-cfg {
			cell-id = <MSM_BUS_SLAVE_MMSS_CLK_CFG>;
			label = "slv-mmss-clk-cfg";
			qcom,buswidth = <8>;
			qcom,agg-ports = <1>;
			qcom,ap-owned;
			qcom,bus-dev = <&fab_mnoc>;
			qcom,slv-rpm-id = <ICBID_SLAVE_MMSS_CLK_CFG>;
		};

		slv_display_cfg:slv-display-cfg {
			cell-id = <MSM_BUS_SLAVE_DISPLAY_CFG>;
			label = "slv-display-cfg";
			qcom,buswidth = <8>;
			qcom,agg-ports = <1>;
			qcom,ap-owned;
			qcom,bus-dev = <&fab_mnoc>;
			qcom,slv-rpm-id = <ICBID_SLAVE_DISPLAY_CFG>;
		};

		slv_display_throttle_cfg:slv-display-throttle-cfg {
			cell-id = <MSM_BUS_SLAVE_DISPLAY_THROTTLE_CFG>;
			label = "slv-display-throttle-cfg";
			qcom,buswidth = <8>;
			qcom,agg-ports = <1>;
			qcom,ap-owned;
			qcom,bus-dev = <&fab_mnoc>;
			qcom,slv-rpm-id = <ICBID_SLAVE_DISPLAY_THROTTLE_CFG>;
		};

		slv_smmu_cfg:slv-smmu-cfg {
			cell-id = <MSM_BUS_SLAVE_MMSS_SMMU_CFG>;
			label = "slv-smmu-cfg";
			qcom,buswidth = <8>;
			qcom,agg-ports = <1>;
			qcom,ap-owned;
			qcom,bus-dev = <&fab_mnoc>;
			qcom,slv-rpm-id = <ICBID_SLAVE_MMSS_SMMU_CFG>;
		};

		slv_mnoc_bimc:slv-mnoc-bimc {
			cell-id = <MSM_BUS_MNOC_BIMC_SLV>;
			label = "slv-mnoc-bimc";
			qcom,buswidth = <32>;
			qcom,agg-ports = <2>;
			qcom,ap-owned;
			qcom,bus-dev = <&fab_mnoc>;
			qcom,connections = <&mas_mnoc_bimc>;
			qcom,slv-rpm-id = <ICBID_SLAVE_MNOC_BIMC>;
			qcom,enable-only-clk;
			clock-names = "node_clk";
			clocks = <&clock_gcc clk_mmssnoc_axi_clk>;
		};

		slv_vmem: slv-vmem {
			cell-id = <MSM_BUS_SLAVE_VMEM>;
			label = "slv-vmem";
			qcom,buswidth = <32>;
			qcom,agg-ports = <1>;
			qcom,ap-owned;
			qcom,bus-dev = <&fab_mnoc>;
			qcom,slv-rpm-id = <ICBID_SLAVE_VMEM>;
			clock-names = "node_clk";
			clocks = <&clock_mmss clk_mmss_mnoc_maxi_clk>;
		};

		slv_srvc_mnoc:slv-srvc-mnoc {
			cell-id = <MSM_BUS_SLAVE_SERVICE_MNOC>;
			label = "slv-srvc-mnoc";
			qcom,buswidth = <8>;
			qcom,agg-ports = <1>;
			qcom,ap-owned;
			qcom,bus-dev = <&fab_mnoc>;
			qcom,slv-rpm-id = <ICBID_SLAVE_SERVICE_MNOC>;
		};

		slv_hmss:slv-hmss {
			cell-id = <MSM_BUS_SLAVE_APPSS>;
			label = "slv-hmss";
			qcom,buswidth = <16>;
			qcom,agg-ports = <1>;
			qcom,ap-owned;
			qcom,bus-dev = <&fab_snoc>;
			qcom,slv-rpm-id = <ICBID_SLAVE_APPSS>;
		};

		slv_lpass:slv-lpass {
			cell-id = <MSM_BUS_SLAVE_LPASS>;
			label = "slv-lpass";
			qcom,buswidth = <16>;
			qcom,agg-ports = <1>;
			qcom,ap-owned;
			qcom,bus-dev = <&fab_snoc>;
			qcom,slv-rpm-id = <ICBID_SLAVE_LPASS>;
		};

		slv_wlan:slv-wlan {
			cell-id = <MSM_BUS_SLAVE_WLAN>;
			label = "slv-wlan";
			qcom,buswidth = <16>;
			qcom,agg-ports = <1>;
			qcom,bus-dev = <&fab_snoc>;
			qcom,slv-rpm-id = <ICBID_SLAVE_WLAN>;
		};

		slv_snoc_bimc:slv-snoc-bimc {
			cell-id = <MSM_BUS_SNOC_BIMC_SLV>;
			label = "slv-snoc-bimc";
			qcom,buswidth = <32>;
			qcom,agg-ports = <2>;
			qcom,bus-dev = <&fab_snoc>;
			qcom,connections = <&mas_snoc_bimc>;
			qcom,slv-rpm-id = <ICBID_SLAVE_SNOC_BIMC>;
		};

		slv_snoc_cnoc:slv-snoc-cnoc {
			cell-id = <MSM_BUS_SNOC_CNOC_SLV>;
			label = "slv-snoc-cnoc";
			qcom,buswidth = <16>;
			qcom,agg-ports = <1>;
			qcom,bus-dev = <&fab_snoc>;
			qcom,connections = <&mas_snoc_cnoc>;
			qcom,slv-rpm-id = <ICBID_SLAVE_SNOC_CNOC>;
		};

		slv_imem:slv-imem {
			cell-id = <MSM_BUS_SLAVE_OCIMEM>;
			label = "slv-imem";
			qcom,buswidth = <16>;
			qcom,agg-ports = <1>;
			qcom,bus-dev = <&fab_snoc>;
			qcom,slv-rpm-id = <ICBID_SLAVE_IMEM>;
		};

		slv_pimem:slv-pimem {
			cell-id = <MSM_BUS_SLAVE_PIMEM>;
			label = "slv-pimem";
			qcom,buswidth = <16>;
			qcom,agg-ports = <1>;
			qcom,bus-dev = <&fab_snoc>;
			qcom,slv-rpm-id = <ICBID_SLAVE_PIMEM>;
		};

		slv_qdss_stm:slv-qdss-stm {
			cell-id = <MSM_BUS_SLAVE_QDSS_STM>;
			label = "slv-qdss-stm";
			qcom,buswidth = <16>;
			qcom,agg-ports = <1>;
			qcom,bus-dev = <&fab_snoc>;
			qcom,slv-rpm-id = <ICBID_SLAVE_QDSS_STM>;
		};

		slv_pcie_0:slv-pcie-0 {
			cell-id = <MSM_BUS_SLAVE_PCIE_0>;
			label = "slv-pcie-0";
			qcom,buswidth = <16>;
			qcom,agg-ports = <1>;
			qcom,ap-owned;
			qcom,bus-dev = <&fab_snoc>;
			qcom,slv-rpm-id = <ICBID_SLAVE_PCIE_0>;
		};

		slv_srvc_snoc:slv-srvc-snoc {
			cell-id = <MSM_BUS_SLAVE_SERVICE_SNOC>;
			label = "slv-srvc-snoc";
			qcom,buswidth = <16>;
			qcom,agg-ports = <1>;
			qcom,bus-dev = <&fab_snoc>;
			qcom,slv-rpm-id = <ICBID_SLAVE_SERVICE_SNOC>;
		};
	};
};