/* * Copyright (c) 2015-2016, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and * only version 2 as published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ &soc { qcom,msm-cam@8c0000 { compatible = "qcom,msm-cam"; reg = <0x8c0000 0x40000>; reg-names = "msm-cam"; status = "disabled"; bus-vectors = "suspend", "svs", "nominal", "turbo"; qcom,bus-votes = <0 300000000 640000000 640000000>; }; qcom,cam_smmu { compatible = "qcom,msm-cam-smmu"; status = "disabled"; msm_cam_smmu_cb1 { compatible = "qcom,msm-cam-smmu-cb"; iommus = <&mmss_smmu 0xc00>, <&mmss_smmu 0xc01>, <&mmss_smmu 0xc02>, <&mmss_smmu 0xc03>; label = "vfe"; qcom,scratch-buf-support; }; msm_cam_smmu_cb2 { compatible = "qcom,msm-cam-smmu-cb"; iommus = <&mmss_smmu 0xa00>; label = "cpp"; }; msm_cam_smmu_cb3 { compatible = "qcom,msm-cam-smmu-cb"; iommus = <&mmss_smmu 0xa01>; label = "camera_fd"; }; msm_cam_smmu_cb4 { compatible = "qcom,msm-cam-smmu-cb"; iommus = <&mmss_smmu 0x800>; label = "jpeg_enc0"; }; msm_cam_smmu_cb5 { compatible = "qcom,msm-cam-smmu-cb"; iommus = <&mmss_smmu 0x801>; label = "jpeg_dma"; }; }; qcom,fd@caa4000 { cell-index = <0>; compatible = "qcom,face-detection"; reg = <0xcaa4000 0x800>, <0xcaa5000 0x400>, <0xca80000 0x3000>; reg-names = "fd_core", "fd_misc", "fd_vbif"; interrupts = <0 293 0>; interrupt-names = "fd"; smmu-vdd-supply = <&gdsc_bimc_smmu>; camss-vdd-supply = <&gdsc_camss_top>; qcom,vdd-names = "smmu-vdd", "camss-vdd"; clocks = <&clock_mmss clk_mmss_camss_top_ahb_clk>, <&clock_mmss clk_fd_core_clk_src>, <&clock_mmss clk_mmss_fd_core_clk>, <&clock_mmss clk_mmss_fd_core_uar_clk>, <&clock_mmss clk_mmss_fd_ahb_clk>, <&clock_mmss clk_mmss_camss_ahb_clk>, <&clock_mmss clk_mmss_camss_cpp_axi_clk>, <&clock_mmss clk_mmss_camss_cpp_vbif_ahb_clk>; clock-names = "camss_top_ahb_clk", "fd_core_clk_src", "fd_core_clk", "fd_core_uar_clk", "fd_ahb_clk", "camss_ahb_clk", "camss_cpp_axi_clk", "cpp_vbif_ahb_clk"; qcom,clock-rates = <0 400000000 400000000>, <0 0 0 0 0>; qcom,msm-bus,name = "msm_camera_fd"; qcom,msm-bus,num-cases = <4>; qcom,msm-bus,num-paths = <1>; qcom,msm-bus,vectors-KBps = <106 512 0 0>, <106 512 13000000 13000000>, <106 512 45000000 45000000>, <106 512 90000000 90000000>; qcom,fd-vbif-reg-settings = <0x20 0x10000000 0x30000000>, <0x24 0x10000000 0x30000000>, <0x28 0x10000000 0x30000000>, <0x2c 0x10000000 0x30000000>; qcom,fd-misc-reg-settings = <0x20 0x2 0x3>, <0x24 0x2 0x3>; status = "disabled"; }; qcom,cpp@ca04000 { cell-index = <0>; compatible = "qcom,cpp"; reg = <0xca04000 0x100>, <0xca80000 0x3000>, <0xca18000 0x3000>, <0xc8c36D4 0x4>; reg-names = "cpp", "cpp_vbif", "cpp_hw", "camss_cpp"; interrupts = <0 294 0>; interrupt-names = "cpp"; smmu-vdd-supply = <&gdsc_bimc_smmu>; camss-vdd-supply = <&gdsc_camss_top>; vdd-supply = <&gdsc_cpp>; qcom,vdd-names = "smmu-vdd", "camss-vdd", "vdd"; clocks = <&clock_mmss clk_mmss_camss_top_ahb_clk>, <&clock_mmss clk_cpp_clk_src>, <&clock_mmss clk_mmss_camss_cpp_ahb_clk>, <&clock_mmss clk_mmss_camss_cpp_axi_clk>, <&clock_mmss clk_mmss_camss_cpp_clk>, <&clock_mmss clk_mmss_camss_micro_ahb_clk>, <&clock_mmss clk_mmss_camss_ahb_clk>, <&clock_mmss clk_mmss_camss_cpp_vbif_ahb_clk>; clock-names = "camss_top_ahb_clk", "cpp_core_clk", "camss_cpp_ahb_clk", "camss_cpp_axi_clk", "camss_cpp_clk", "micro_iface_clk", "camss_ahb_clk", "cpp_vbif_ahb_clk"; qcom,clock-rates = <0 200000000 0 0 200000000 0 0 0>; qcom,min-clock-rate = <200000000>; qcom,bus-master = <1>; qcom,vbif-qos-setting = <0x20 0x10000000>, <0x24 0x10000000>, <0x28 0x10000000>, <0x2C 0x10000000>; status = "disabled"; qcom,msm-bus,name = "msm_camera_cpp"; qcom,msm-bus,num-cases = <2>; qcom,msm-bus,num-paths = <1>; qcom,msm-bus,vectors-KBps = <106 512 0 0>, <106 512 0 0>; qcom,msm-bus-vector-dyn-vote; qcom,cpp-fw-payload-info { qcom,stripe-base = <790>; qcom,plane-base = <715>; qcom,stripe-size = <63>; qcom,plane-size = <25>; qcom,fe-ptr-off = <11>; qcom,we-ptr-off = <23>; qcom,ref-fe-ptr-off = <17>; qcom,ref-we-ptr-off = <36>; qcom,we-meta-ptr-off = <42>; qcom,fe-mmu-pf-ptr-off = <7>; qcom,ref-fe-mmu-pf-ptr-off = <10>; qcom,we-mmu-pf-ptr-off = <13>; qcom,dup-we-mmu-pf-ptr-off = <18>; qcom,ref-we-mmu-pf-ptr-off = <23>; qcom,set-group-buffer-len = <135>; qcom,dup-frame-indicator-off = <70>; }; }; qcom,ispif@ca31000 { cell-index = <0>; compatible = "qcom,ispif-v3.0", "qcom,ispif"; reg = <0xca31000 0xc00>, <0xca00020 0x4>; reg-names = "ispif", "csi_clk_mux"; interrupts = <0 309 0>; interrupt-names = "ispif"; qcom,num-isps = <0x2>; camss-vdd-supply = <&gdsc_camss_top>; vfe0-vdd-supply = <&gdsc_vfe0>; vfe1-vdd-supply = <&gdsc_vfe1>; qcom,vdd-names = "camss-vdd", "vfe0-vdd", "vfe1-vdd"; clocks = <&clock_mmss clk_mmss_camss_top_ahb_clk>, <&clock_mmss clk_mmss_camss_ahb_clk>, <&clock_mmss clk_mmss_camss_ispif_ahb_clk>, <&clock_mmss clk_csi0_clk_src>, <&clock_mmss clk_mmss_camss_csi0_clk>, <&clock_mmss clk_mmss_camss_csi0rdi_clk>, <&clock_mmss clk_mmss_camss_csi0pix_clk>, <&clock_mmss clk_csi1_clk_src>, <&clock_mmss clk_mmss_camss_csi1_clk>, <&clock_mmss clk_mmss_camss_csi1rdi_clk>, <&clock_mmss clk_mmss_camss_csi1pix_clk>, <&clock_mmss clk_csi2_clk_src>, <&clock_mmss clk_mmss_camss_csi2_clk>, <&clock_mmss clk_mmss_camss_csi2rdi_clk>, <&clock_mmss clk_mmss_camss_csi2pix_clk>, <&clock_mmss clk_csi3_clk_src>, <&clock_mmss clk_mmss_camss_csi3_clk>, <&clock_mmss clk_mmss_camss_csi3rdi_clk>, <&clock_mmss clk_mmss_camss_csi3pix_clk>, <&clock_mmss clk_vfe0_clk_src>, <&clock_mmss clk_mmss_camss_vfe0_clk>, <&clock_mmss clk_mmss_camss_csi_vfe0_clk>, <&clock_mmss clk_vfe1_clk_src>, <&clock_mmss clk_mmss_camss_vfe1_clk>, <&clock_mmss clk_mmss_camss_csi_vfe1_clk>; clock-names = "camss_top_ahb_clk", "camss_ahb_clk", "ispif_ahb_clk", "csi0_src_clk", "csi0_clk", "csi0_pix_clk", "csi0_rdi_clk", "csi1_src_clk", "csi1_clk", "csi1_pix_clk", "csi1_rdi_clk", "csi2_src_clk", "csi2_clk", "csi2_pix_clk", "csi2_rdi_clk", "csi3_src_clk", "csi3_clk", "csi3_pix_clk", "csi3_rdi_clk", "vfe0_clk_src", "camss_vfe_vfe0_clk", "camss_csi_vfe0_clk", "vfe1_clk_src", "camss_vfe_vfe1_clk", "camss_csi_vfe1_clk"; qcom,clock-rates = <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>; qcom,clock-control = "NO_SET_RATE", "NO_SET_RATE", "NO_SET_RATE", "INIT_RATE", "NO_SET_RATE", "NO_SET_RATE", "NO_SET_RATE", "INIT_RATE", "NO_SET_RATE", "NO_SET_RATE", "NO_SET_RATE", "INIT_RATE", "NO_SET_RATE", "NO_SET_RATE", "NO_SET_RATE", "INIT_RATE", "NO_SET_RATE", "NO_SET_RATE", "NO_SET_RATE", "INIT_RATE", "NO_SET_RATE", "NO_SET_RATE", "INIT_RATE", "NO_SET_RATE", "NO_SET_RATE"; status = "disabled"; }; vfe0: qcom,vfe0@ca10000 { cell-index = <0>; compatible = "qcom,vfe48"; reg = <0xca10000 0x4000>, <0xca40000 0x3000>; reg-names = "vfe", "vfe_vbif"; interrupts = <0 314 0>; interrupt-names = "vfe"; vdd-supply = <&gdsc_vfe0>; camss-vdd-supply = <&gdsc_camss_top>; smmu-vdd-supply = <&gdsc_bimc_smmu>; qcom,vdd-names = "vdd", "camss-vdd", "smmu-vdd"; clocks = <&clock_mmss clk_mmss_camss_top_ahb_clk>, <&clock_mmss clk_mmss_camss_ahb_clk>, <&clock_mmss clk_vfe0_clk_src>, <&clock_mmss clk_mmss_camss_vfe0_clk>, <&clock_mmss clk_mmss_camss_csi_vfe0_clk>, <&clock_mmss clk_mmss_camss_vfe0_ahb_clk>, <&clock_mmss clk_mmss_camss_vfe_vbif_ahb_clk>, <&clock_mmss clk_mmss_camss_vfe0_stream_clk>, <&clock_mmss clk_mmss_camss_vfe_vbif_axi_clk>, <&clock_mmss clk_mmss_bimc_smmu_axi_clk>; clock-names = "camss_top_ahb_clk" , "camss_ahb_clk", "vfe_clk_src", "camss_vfe_clk", "camss_csi_vfe_clk", "vfe_ahb_clk", "vfe_vbif_ahb_clk", "vfe_stream_clk", "vfe_vbif_axi_clk", "mmss_smmu_axi_clk"; qcom,clock-rates = <0 0 384000000 0 0 0 0 0 0 0 0 0 576000000 0 0 0 0 0 0 0 0 0 600000000 0 0 0 0 0 0 0>; status = "disabled"; qos-entries = <8>; qos-regs = <0x404 0x408 0x40c 0x410 0x414 0x418 0x41c 0x420>; qos-settings = <0xaaa9aaa9 0xaaa9aaa9 0xaaa9aaa9 0xaaa9aaa9 0xaaa9aaa9 0xaaa9aaa9 0xaaa9aaa9 0xaaa9aaa9>; vbif-entries = <3>; vbif-regs = <0x124 0xac 0xd0>; vbif-settings = <0x3 0x40 0x1010>; ds-entries = <17>; ds-regs = <0x424 0x428 0x42c 0x430 0x434 0x438 0x43c 0x440 0x444 0x448 0x44c 0x450 0x454 0x458 0x45c 0x460 0x464>; ds-settings = <0xcccc0011 0xcccc0011 0xcccc0011 0xcccc0011 0xcccc0011 0xcccc0011 0xcccc0011 0xcccc0011 0xcccc0011 0xcccc0011 0xcccc0011 0xcccc0011 0xcccc0011 0xcccc0011 0xcccc0011 0xcccc0011 0x40000103>; qcom,msm-bus,name = "msm_camera_vfe"; qcom,msm-bus,num-cases = <2>; qcom,msm-bus,num-paths = <1>; qcom,msm-bus,vectors-KBps = <29 512 0 0>, <29 512 100000000 100000000>; qcom,msm-bus-vector-dyn-vote; }; vfe1: qcom,vfe1@ca14000 { cell-index = <1>; compatible = "qcom,vfe48"; reg = <0xca14000 0x4000>, <0xca40000 0x3000>; reg-names = "vfe", "vfe_vbif"; interrupts = <0 315 0>; interrupt-names = "vfe"; vdd-supply = <&gdsc_vfe1>; camss-vdd-supply = <&gdsc_camss_top>; smmu-vdd-supply = <&gdsc_bimc_smmu>; qcom,vdd-names = "vdd", "camss-vdd", "smmu-vdd"; clocks = <&clock_mmss clk_mmss_camss_top_ahb_clk>, <&clock_mmss clk_mmss_camss_ahb_clk>, <&clock_mmss clk_vfe1_clk_src>, <&clock_mmss clk_mmss_camss_vfe1_clk>, <&clock_mmss clk_mmss_camss_csi_vfe1_clk>, <&clock_mmss clk_mmss_camss_vfe1_ahb_clk>, <&clock_mmss clk_mmss_camss_vfe_vbif_ahb_clk>, <&clock_mmss clk_mmss_camss_vfe1_stream_clk>, <&clock_mmss clk_mmss_camss_vfe_vbif_axi_clk>, <&clock_mmss clk_mmss_bimc_smmu_axi_clk>; clock-names = "camss_top_ahb_clk" , "camss_ahb_clk", "vfe_clk_src", "camss_vfe_clk", "camss_csi_vfe_clk", "vfe_ahb_clk", "vfe_vbif_ahb_clk", "vfe_stream_clk", "vfe_vbif_axi_clk", "mmss_smmu_axi_clk"; qcom,clock-rates = <0 0 384000000 0 0 0 0 0 0 0 0 0 576000000 0 0 0 0 0 0 0 0 0 600000000 0 0 0 0 0 0 0>; status = "disabled"; qos-entries = <8>; qos-regs = <0x404 0x408 0x40c 0x410 0x414 0x418 0x41c 0x420>; qos-settings = <0xaaa9aaa9 0xaaa9aaa9 0xaaa9aaa9 0xaaa9aaa9 0xaaa9aaa9 0xaaa9aaa9 0xaaa9aaa9 0xaaa9aaa9>; vbif-entries = <3>; vbif-regs = <0x124 0xac 0xd0>; vbif-settings = <0x3 0x40 0x1010>; ds-entries = <17>; ds-regs = <0x424 0x428 0x42c 0x430 0x434 0x438 0x43c 0x440 0x444 0x448 0x44c 0x450 0x454 0x458 0x45c 0x460 0x464>; ds-settings = <0xcccc0011 0xcccc0011 0xcccc0011 0xcccc0011 0xcccc0011 0xcccc0011 0xcccc0011 0xcccc0011 0xcccc0011 0xcccc0011 0xcccc0011 0xcccc0011 0xcccc0011 0xcccc0011 0xcccc0011 0xcccc0011 0x40000103>; qcom,msm-bus,name = "msm_camera_vfe"; qcom,msm-bus,num-cases = <2>; qcom,msm-bus,num-paths = <1>; qcom,msm-bus,vectors-KBps = <29 512 0 0>, <29 512 100000000 100000000>; qcom,msm-bus-vector-dyn-vote; }; qcom,vfe { compatible = "qcom,vfe"; num_child = <2>; }; };